View AT88RF020-WA1_4338386.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1. features ? 13.56 mhz rfid chip for cards or tags ? 2048-bit read/wri te rfid eeprom ? iso 14443-2 type b compliant ? full iso 14443-3 compliant anticollision ? 100,000 write cycle reliability ? 3 ms write time ? password and lockwrite protection ? 82 pf tuning capacitor ? 0 ? 70 ? c operation 2. description the at88rf020 is a low-end 13.56 mhz rfid (radio frequency identification) device that includes an on-chip eeprom-b ased (nonvolatile) memory. the wireless interface complies with type b operation of iso/iec 14443. the specific sections of compliance are 14443-1, as well as 144 43-2:1999(e) (dated 5/2/00) and 14443- 3:2000(e) (dated 7/13/00). this device is designed to be used in app lications where one or more rfid devices will be simultaneously placed within an inte lligent reader/writer rf field. communica- tion between the rf reader/writer and this device will take place through the use of the featured anticollision command set supported by this device. the memory contains a total of 2048 bits, organized as 32 64-bit pages. write opera- tions are designed to complete in less than three milliseconds (ms). the endurance rating for the memory is 100,000 write cycles per byte. this device supports these security featur es: password checking, data locking, a one- way counter and a guaranteed unique serial number. the at88rf020 includes an on-chip internal tuning capacitor that enables it to oper- ate with a single external coil antenna. th is antenna completes the rfid channel. 13.56 mhz, 2048-bit rfid eeprom at88rf020 rev. 2010d?rfid?04/09
2 2010d?rfid?04/09 at88rf020 figure 2-1. block diagram all bits are sent to or read from the chip least sign ificant bit first. bit fields listed in this document are listed with the lsb on the le ft and the msb on the right. multibyte information is sent to the chip least significant byte first. the first byte sent to the chip is stored in memory at the lowest address, and the internal address is incremented for subsequent bytes. info rmation is read from the memory and transmit- ted by the chip in exactly the same order in which it was written: the first bit written is the first bit read. this specification follows the nomenclature found within the is o/iec 14443 document. proximity coupling device (pcd) is the reader /writer, and proximity integrated circuit card (picc) is the tag/card. etu refers to elementary time unit, wh ich is the time required to transmit or receive one bit. one etu is equal to 128 carrier cycles (9.439 s). rfu re fers to any feature, item, bit field or bit that is held as reserved for future use. when the reader/writer sends data to this device, rfu bits should always be ?0?. when this device sends data to the reader/writer, rfu bits are undefined. eeprom clock extraction data modulation control regulator bridge rectifier
3 2010d?rfid?04/09 at88rf020 3. memory map the memory array within this device is organized as shown in table 3-1 . bytes marked ??? in table 3-1 are user-defined and will be set to 0x00 upon shipment from atmel. the chip accesses t hese bytes using specific commands described later in this document. a total of 1904 bits (238 bytes) are available fo r user-defined purposes, including the reserved and signature fields but excluding the pupi, lock bits, counter and password fields in the above memory map. the fields named above are defined as follows: pseudo unique picc identifier: this pupi field is a unique serial number permanently written into the device?s nonvolatile memory at the atme l factory during wafer probe/test. it cannot be modified and is guaranteed to be unique for all at 88rf020 devices. customers desiring serial numbers longer than 32 bits are expected to use other locations within the memory, including the reserved field within page 1. application data: this field is transmitted unmodified from the card to the reader/writer as part of the atqb command response. counter: this field is automatically incremen ted by the device whenever the count i nstruction is executed. it is factory set to the va lue of zero upon shipment from atmel. signature: this field is written unmodified into th e first six bytes of page 2 via the count instruction. it is expected that this value will be re lated to the count and ma y be encrypted by the reader/writer. in this manner, the counter and signature fields together can provide an addi- tional level of security from tampering. pages 0, 1 and 2 can always be read by the system; page 3 may never be read by the system; and all remaining pages can be read only after t he proper password has been sent to the chip. the lockbits field within page 0 can be modified only through the use of the lock command and only after the proper password has been sent to the chip. the contents of page 2 can only be modified using the count command?again, only after the proper password has been sent to the chip. all other pages (1 and 3 through 31) can be written to only after the proper password has been validated by the chip. the first four bytes of page 0 comprise the serial number (pupi) and, table 3-1. memory map byte 0 byte 1 byte 2 byte 3 byte 4 byte 5 byte 6 byte 7 page 0 pseudo unique picc id lockbits page 1 application data reserved page 2 signature counter page 3 password page 4 ???????? ... ... ... page 31 ????????
4 2010d?rfid?04/09 at88rf020 although the adjacent lockbits field is updateabl e, the serial number can never be changed dur- ing any kind of operation. 4. communications the electrical signaling of the chip is fully compatible with iso 14443-2, ?radio frequency power and signal interface,? version 1999(e) for type b only. anticollision operation and frame formatting is compatible with iso 14443-3 type b, ?initializat ion and anticollision,? version 2000(e), type b only. 4.1 command/data transmission frame all data sent between the picc and pcd is sent as characters (see iso 14443-3, section 7.1.1). the character is composed of a start bit (logic ?0 ?), 8 bits of data and a stop bit (logic ?1?). between characters is an extra guard time (egt) that must not exceed 6 etus (~57 microsec- onds (s)) for data sent to th e picc and will be two etus for data sent to the pcd (see iso 14443-3, section 7.1.2). the picc will automatically resynchronize characte r reception (internal cl ocks) with the start bit of each incoming character. groups of characters exchanged between the pc d and picc comprise a fr ame, which is delim- ited by a start of frame (sof) and an end of frame (eof) signal protocol (see iso 14443-3, sections 7.1.3?7.1.5). after the read command has been received by the picc, the pi cc will respond with the data frame following a delay of 8 etus (~75.5 s) and transmit a sub carrier for a period of 10 etus (~94.4 s) with no phase changes (see iso 14 443-3, section 7.1.6, and iso 14443-2, section 9.2.5.). note: this device ignores attempts to reduce the minimum tr0 and tr1 values from the iso 14443-2 defaults as may be specified by the pcd in t he attrib command (see iso 14443-3, sections 7.10.3.1 and 7.10.3.2.). 5. crc a 2-byte crc code is included in all frame transmissions. t he crc polynomials are defined as: x 16 + x 12 + x 5 + x 0 this is a hex polynomial of 1021. the crc regi ster is initialized to 0xffff. when receiving information from the system, the device comput es the crc on the incoming command, data and crc bytes (start/stop bits, sot, eot and egt are ignored). when the last bit of the crc has been received, the value in the crc register sh ould be 0x0000. when the device transmits data, the crc is computed based on all outgoing data bits.
5 2010d?rfid?04/09 at88rf020 6. anticollision anticollision is implemented as per iso 14443-3, type b (see iso 14443-3, sections 7.3 and 7.4). there are four primitive commands that support the anticollision scheme: reqb/wupb, slotmarker, attrib and hltb. 6.1 reqb/wupb command this 5-byte command (see iso 14443-3, section 7.7) is used for the pcd to probe the field for piccs or to wake up piccs that are in the halt state. the first byte must be a fixed 0x05. this chip will respond only to va lues of 0x00 or 0x01 in the second (a fi) byte. bit 3 of the third byte is used to select between reqb and wupb commands, while bits 0?2 are used to set n, which is used for the command response (atqb). if the picc receives a wupb command with an invalid afi code, then it will remain in the halt state. when the picc receives one of these commands properly encod ed, it will generate a random number (r) of up to four bits, according to t he value of n passed by the pcd and specified in table 13 of iso 14443-3 and in table 6-1 on page 5 . if n = 1 or the random number generator selects r = 1, then the picc will send an atqb and listen for reqb/wupb , attrib and hltb commands. otherwise, it will wait for the slotmarker command that matches the value r selected by the random number generator. the response to both of these commands is an atqb packet. this format is as specified in iso 14443-3, section 7.9.1, with the following values: table 6-1. command codes binary code (in cmd) n size of r (in bits) 000 1 ? 100 2 1 010 4 2 110 8 3 001 16 4 pupi: as stored in memory (unique serial number) application data: as stored in memory protocol info: 0x00, 0x00, 0x41 (bit_rate_capability: 106 kbps only) (max_frame_size: 16) (protocol type: not compliant with 14443-4) (fwi: frame waiting time minimal, 4.8 ms) (adc: application data coding is proprietary) (fo: only cid (card identi fier) supported by picc)
6 2010d?rfid?04/09 at88rf020 6.2 attrib command the attrib command is used to select among a ll the chips that may have responded to a given reqb/wupb command. the chip will respond to attrib commands from 11 to 16 bytes in length where the 2nd, 3rd, 4th and 5th bytes exac tly match the pupi stored in the memory. if the chip responds to the attrib command, it enters the active state where the data transfer com- mands described a bove will be honored. the picc ignores all the param bytes with the e xception of the least significant four bits of param4, which are stored within the chip as the cid for future re sponses. any higher layer inf command is also ignored. the picc response to a valid attrib command is always three bytes long . the first byte con- tains the cid in the lower nibble and 0x0 in the upper nibble. the next two bytes are the crc. 6.3 hltb command the hltb command is used to set the picc to the halt state, after wh ich only the wupb com- mand will be acknowledged. the form at of this 7-byte command is 0x50, pupi (4 bytes), crc (2 bytes). the chip always responds to a valid hltb command with the 3-byte sequence: 0x00, crc_0 and crc_1. the hltb command is not valid if the picc is in the active state (see iso 14443-3 sections 7.4.7 and 7. 12 for additional information). 6.4 slotmarker command the slotmarker command provides a way for the reader to query those cards for which the generated random number r is greater than 1. it is a 3-byte command, the last two of which are the crc bytes. the least significant nibble of the fi rst byte is the slot number, and if this matches the generated r andom number, then the atqb response is generated. the chip will truncate the slot number field to match the value of n provi ded in the reqb command. the most significant nibble of this command is fixed at 0xa.
7 2010d?rfid?04/09 at88rf020 figure 6-1. at88rf020 anticollision and st ate transition flow chart power on reset wait for reqb or wupb afi match ? is n = 1? select random number "r" in range 1 to "n" is r = 1? wait for slot marker = "r" send atqb response wait for attrib or hltb with pupi match receive cid assignment send answer to hltb active state halt state wait for wupb with afi match no yes no yes yes no reqb or wupb reqb or wupb attrib hltb deselect matched slot marker send answer to attrib anticollision the at88rf020 processes the following commands when in the active state and only when the cid embedded in the command matches the cid assigned to the ic : read write lock check password count deselect all other commands are ignored when the ic is in the active state.
8 2010d?rfid?04/09 at88rf020 7. data transfer commands the following commands are supported for data transfer when the chip is in the active state (see iso 14443-3, section 7.4.7). if the command is properly received (crc correct, legal opcode and address, etc.), the chip will respond either with a nack command, an ack com- mand or data. otherwise, the chip will silently wait for a proper co mmand. the chip supports additional commands as part of the anticollis ion sequencing; these commands are documented elsewhere in this data sheet. on-chip passwor d checking is required for most operations. the coding of these commands is described in table 8-1 and table 8-2 on page 10 . below is a description of the individual commands supported. 7.1 read command the addressed 64-bit page referenced in the read command is returned to the pcd. the picc will respond with the data if the address is correct, the page is readable and the password has been sent; otherwise, it will respond with a nack. password checking is not required to read pages 0, 1 and 2, but all other pages require a previously ex ecuted valid password check to read the chip. there is no byte read capability. page 3 (the actu al password) can never be read directly and is only accessed internally du ring the password command. the chip will nack any attempt to read page 3. 7.2 write command the 64-bit memory page referenced in the write command is written with the data that follows the command byte. the chip ignores the upper 3 bits of the byte-wide memory address and the lower five bits from the memory address. if the target page cannot be written to because t he page is read only or is locked, or if the chip has not been properly opened to access with a valid password, then a nack command will be issued by the picc. ot herwise, an ack command will be transmitted after the memory write operation has been completed. reader/writer modulation is prohibited during the memory write time, which is the time period between the pcd?s eof and the issuance of the pi cc?s ack command. this period is less than 3 ms and is considered to be an extende d tr0 wait interval, as per iso 14443. memory is never modified if a nack command is issued. pages 0 and 2 (pupi, lockbits, signa- ture and counter) cannot be written with this co mmand. addressing either page 0 or page 2 within the write command will re sult in a nack command being issued by the device. 7.3 lock command the lock command can be executed only after proper password validation has been per- formed. the lock command locks the addressed memory location from future changes. the memory location can still be read with proper passwor d validation. the last 31 bits of data within the lock command are logically ored within t he device with the 31-bit value stored within the lockbits field of page 0 (see memory map, table 3-1 on page 3 ). the result is then written back into the memory. after the memory has been wr itten, an ack command will be transmitted. a nack command is issued if the lock command is attempted without previous password validation. if power is interrupted during this write, all bits within lockbits may be set to ?1?, and the chip may be disabled. the first 33 bits of data se nt within the command to the picc are ignored.
9 2010d?rfid?04/09 at88rf020 the bits within the lockbits field correspond to the pages within the memory and, if set to ?1?, prevent all future writes to the corresponding page; i.e., lockbits field bit 6 locks page 6 when it is set to a ?1?. there is no mechanism to ever ?unlock? a page, so once a page is locked, it can never be unlocked and, as such, can never be modifi ed. the 31-bit lockbits field is set to all ?0?s upon shipment from the factory. bit 0 of the lockb its field is ignored for obvious reasons, since it would normally point to memory page 0, which contains the embedded pupi (serial number) and the actual lockbits field. a command to lock page 0 with password access will result in an ack command being issued with no other effects, since page 0 can never be locked. attempting to lock page 0 is not viewed as an error, so the command will be executed in t he normal manner. 7.4 check password command the 64-bit value embedded withi n the check password command is compared to the pass- word stored within page 3 of the memory (see memory map, table 3-1 on page 3 ). if the input password matches the stored pa ssword, then the chip will reply with an ack command, and the device will be open to access. if the input password does not match the internally stored pass- word, then the chip will reply with a nack command. this command must be executed (and the proper password sent) before most device accesses are allowed (some accesses are permitted without password va lidation). the chip will remain accessible until power is removed or an incorre ct password is sent to the chip. if a subsequent password check fails, the chip will become inaccessible until a valid password check is again executed. once the password has been properly acknowledged and device access opened, the current password can be changed using the write comm and. the device will re main active after the new password has been written until power is removed or until a subsequent invalid password check occurs. the only password that is not allowed is the ?all ones? password. if the check password command is attempted for an ?all ones? password, the device will respond with a nack com- mand. if the ?all ones? password is validly programmed into this device using the write command, the device will foreve r be locked out of future password validated accesses. it is strongly suggested that the ?all zeroes? pa ssword be avoided since this password is consid- ered too simplistic and could represent a security risk. the device is delivered with all zeros in the password page. 7.5 deselect command if the deselect command is properly received an d the picc is in the active state, the picc will issue an ack command and enter the halt stat e. its functionality is identical to hltb as described in the anticollision section. a nack response is never issu ed following this command (see iso 14443-3, section 7.4.7). 7.6 count command the count command is used to write page 2. th e first six bytes sent by the pcd (referred to as the signature) are written to the first six bytes of page 2 unmodified. the last two bytes of data sent by the pcd in th e count command are only plac eholders and will be ignored. the 16-bit value stored in the counter field of pa ge 2 is incremented by one each time count is executed. once the value of the counter r eaches 0x8000, no further count operations will be
10 2010d?rfid?04/09 at88rf020 executed, and page 2 will be effectively locked against further modification. password validation must occur before the count command is permitted. the chip will compute the new incremented count t hat will be written into the last two bytes of page 2 immediately following the incoming 6-byte da ta field. it is expected that at least part of the 6-byte value will be the resu lt of an externally computed cryptographic operation on the new counter value, thus permitting some degree of transaction validation. if the write cannot take place (because counter has a value of 0x8000, page 2 is locked or no password has been sent), then a nack command will be issued by the picc; otherwise, an ack command will be transmitted after the write has completed. 8. data transfer command formats the first byte of each command includes the cid as the least significant nibble followed by the command opcode (cop) as the most significant nibble. cop is encoded according to table 8-1 . all these commands consist of 12 bytes to be sent to the picc by the pcd. cid is the card id byte as received by the picc during the antico llision sequence. the address field in the follow- ing chart is a 5-bit value, and the device ignore s the most significant three bits of the byte. therefore, the device will interp ret a value of 0xff as 0x1f. the command bytes are shown in table 8-2 . a valid read command response is a 12-byte frame sent from the picc to the pcd and is for- matted as shown in table 8-3 . table 8-1. command summary lsb msb command description 0010read 64-bit page from memory 1100write 64-bit page to memory 0100lock data is ored with existing lockbits value 0110check p assword 0101d eselect 0111count table 8-2. command bytes commands 1st byte 2nd byte 3rd?10 th bytes 11th byte 12th byte read cid | 0x4 address ignored crc_0 crc_1 write cid | 0x3 address 64 bits data crc_0 crc_1 lock cid | 0x2 ignored 32 bits ignored, 32 bits data crc_0 crc_1 check password cid | 0x6 ignored 64 bits data crc_0 crc_1 deselect cid | 0xa ignored ignored crc_0 crc_1 count cid | 0xe ignored 16 bits ignored, 48 bits data crc_0 crc_1 table 8-3. picc frame format commands 1st byte 2nd byte 3rd?10th bytes 11th byte 12th byte read cid | 0x4 address 64 bits data crc_0 crc_1
11 2010d?rfid?04/09 at88rf020 both the ack and nack responses consis t of a 4-byte frame sent from the picc to the pcd and are formatted as shown in table 8-4 . there are two parts to the second byte of the ack and nack response commands (see table 8-4 ): the most significant nibble and the least significant nibble. for each command, the most significant nibb le is not guaranteed, and therefore the reader/writer should mask this field when assessing whether an ack or a nack has been issued by the picc. as indicated in table 8-4 , the least significant nibbl e of the second byte will always be a ?0? for an ack and a ?1? for a nack. for an ack, the most significant nibble of the second byte will be undefined. for a nack, the most significant nibble of the second byte cont ains an error feedback code. this error code rep- resents the error that caused the nack response command. 9. electrical this device includes a voltage reference to ens ure that the chip operates only when the power supply voltage on the chip is above a required leve l of 1.8 ? 2.0 volts. memory writes are guaran- teed above this voltage leve l. the on-chip regulator will ens ure that the vdd voltage will be within the range of 2.1 ? 2.5 volts. the chip is specified to operate over the temperature range of 0 ? c to 70 ? c (junction tempera- ture). the coil pads ( ac1 and ac2 ) offer esd protection at levels greater than 2 kv. the input capacitance of the coil pins will be 82 pf and may vary by 10% over process, temper- ature, voltage and frequency. internal power supply bypass capacitance is integrated on the chip. table 8-4. ack and nack description 1st byte 2nd byte 3rd byte 4th byte ack cid | cop 0xx0 crc_0 crc_1 nack cid | cop 0xx1 crc_0 crc_1 table 8-5. error codes ack/nack 2nd byte command decode xxxx 0000ack, no errors detected 00010001nack, attempted write to locked page xx100001 nack, terminal count reached or attempted operation to invalid address 01000001nack, invalid password attempted 10000001nack, low-voltage c ondition detected
12 2010d?rfid?04/09 at88rf020 10. package drawing 10.1 16s2 ? soic 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 16s2 , 16-lead, 0.300" wide body, plastic gull wing small outline package (soic) 1/9/02 16s2 a common dimensions (unit of measure = inches) symbol min nom max note notes: 1. this drawing is for general information only; refer to jedec drawing ms-013, variation aa for additional information. 2. dimension d does not include mold flash, protrusions or gate burrs. mold flash, protrusions and gate burrs shall not exceed 0.15 mm (0.006") per side. 3. dimension e does not include inter-lead flash or protrusion. inter-lead flash and protrusions shall not exceed 0.25 mm (0.010") per side. 4. l is the length of the terminal for soldering to a substrate. 5. the lead width b, as measured 0.36 mm (0.014") or greater above the seating plane, shall not exceed a maximum value of 0.61 m m (0.024") per side. a 0.0926 ? 0.1043 a1 0.0040 ? 0.0118 b 0.0130 ? 0.0200 5 c 0.0091 ? 0.0125 d 0.3977 ? 0.4133 2 e 0.2914 ? 0.2992 3 h 0.3940 ? 0.4190 l 0.0160 ? 0.050 4 e 0.050 bsc l a1 side view top view end view h e b n 1 e a d c
13 2010d?rfid?04/09 at88rf020 11. mechanical 11.1 package sample pinout pin 1 = ac1 pin 16 = ac2 all other pins should float. 11.2 pad information the layout of the die is shown in figure 12-1 on page 13 . the antenna coil contact pads ( ac1 and ac2 ) and the test 5, 6 and 7 pad passivation op enings are 90x90 microns. the antenna coil and test 5, 6 and 7 pads are designed to be compatible with current factory production bump mounting processes. 12.1 die layout figure 12-1. die layout 12. ordering information ordering code package operation range AT88RF020-WA1 at88rf020-mr1 die on wafer, 82 pf rf module r (xoa2), 82 pf, green commercial (0 ? c to 70 ? c) .0735" x .0769" at29654 test 6 test 7 ac2 ac1 test 5 test 4 test 3 test 2 test 1
14 2010d?rfid?04/09 at88rf020 overall die size: 1.866 mm x 1.953 mm 73.5 mils x 76.9 mils pad size: 80 m (square pad) 90 m (octagon pad) 3.1 mils 3.5 mils pad location ac1 x= 198.44 m x= 7.813 mils y= 645.44 m y= 25.411 mils ac2 x= 581.40 m x= 22.890 mils y= 645.44 m y= 25.411 mils te s t 1 x= ? 102.54 m x= ? 4.037 mils y= 854.48 m y= 33.641 mils te s t 2 x= ? 235.68 m x= ? 9.279 mils y= 854.48 m y= 33.641 mils te s t 3 x= ? 383.44 m x= ? 15.096 mils y= 854.48 m y= 33.641 mils te s t 4 x= ? 533.20 m x= ? 20.992 mils y= 854.48 m y= 33.641 mils te s t 5 x= ? 776.80 m x= ? 30.583 mils y= 732.00 m y= 28.819 mils te s t 6 x= ? 776.80 m x= ? 30.583 mils y= ? 732.00 m y= ? 28.819 mils test 7 x= 805.84 m x= 31.726 mils y= ? 732.00 m y= 28.819 mils
2010d?rfid?04/09 headquarters international atmel corporation 2325 orchard parkway san jose, ca 95131 usa tel: 1(408) 441-0311 fax: 1(408) 487-2600 atmel asia unit 1-5 & 16, 19/f bea tower, millennium city 5 418 kwun tong road kwun tong, kowloon hong kong tel: (852) 2245-6100 fax: (852) 2722-1369 atmel europe le krebs 8, rue jean-pierre timbaud bp 309 78054 saint-quentin-en- yvelines cedex france tel: (33) 1-30-60-70-00 fax: (33) 1-30-60-71-11 atmel japan 9f, tonetsu shinkawa bldg. 1-24-8 shinkawa chuo-ku, tokyo 104-0033 japan tel: (81) 3-3523-3551 fax: (81) 3-3523-7581 product contact web site www.atmel.com technical support securerf@atmel.com sales contact www.atmel.com/contacts literature requests www.atmel.com/literature disclaimer: the information in this document is provided in connection wi th atmel products. no license, expr ess or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of atmel products. except as set forth in atmel?s terms and condi- tions of sale located on atmel?s web site, atmel assumes no li ability whatsoever and disclaims any express, implied or statutor y warranty relating to its products including , but not limited to, the implied warranty of merchantability, fitness for a particu lar purpose, or non-infringement. in no event shall atmel be liable for any direct, indire ct, consequential, punitive, special or i nciden- tal damages (including, without li mitation, damages for loss of profits, business interruption, or loss of information) arising out of the use or inability to use this document, even if atmel has been advised of the possibility of such damages. atmel makes no representations or warranties with respect to the accuracy or comp leteness of the contents of th is document and reserves the rig ht to make changes to specifications and product descriptions at any time without notice. atmel does not make any commitment to update the information contained her ein. unless specifically provided otherwise, atmel products are not suitable for, and shall not be used in, automotive applications. atmel?s products are not int ended, authorized, or warranted for use as components in applications intended to support or sustain life. ? 2009 atmel corporation. all rights reserved. atmel?, atmel logo and combinations thereof, and others are registered trademarks or trade- marks of atmel corporation or its subsidiaries. innovatron? is a registered trademark of innovatron. other terms and product na mes may be trademarks of others.

▲Up To Search▲

Price & Availability of AT88RF020-WA1

	To Download AT88RF020-WA1 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .